A bit slice system provides a designer with the tools to customize a processor to the needs of a given application. The bit slice architecture utilizes a bit slice processor which is comprised of a microsequencer and an expanded bit slice arithmetic logic unit (ALU). The microsequencer is combined with a microprogram memory and a microinstruction register to provide control codes for the bit slice ALU. This type of a processor is effectively a computer for disposal within a more sophisticated computer architecture. With the bit slice system, the designer can define the details of the system operation, including the instruction set to be implemented. This allows the designer to deviate from the preset instruction set which is common to most processors.
The bit slice ALU is a fundamental part of the system. This element is designed so that it can be connected to similar elements to provide an ALU of any desired word width. Central to the ALU slice is that its operation can be expanded to any number of bits by interconnection of like ALUs. For example, if an ALU with eight bits per circuit is utilized, four circuits would form the ALU for a thirty-two bit processor. The carry and shift lines provide communication between ALUs so that multiple bit arithmetic operations can be performed.
When a number of bit slice ALUs are combined to provide an expanded word width, some functions require various status information such as overflow, zero, etc., in order to process data in a pipeline fashion especially with operations such as multiplication and division. Conventional systems utilize a Zero status output which examines all the bits in the result and outputs this status information to the remaining bit slice ALUs in a multiple bit slice ALU system. The zero output is a status signal providing status from one bit slice ALU to another. However, there are some functions that require control commands from one bit slice ALU to another. In conventional systems, the zero output is multiplexed to provide some control information for various functions. However, present systems do not provide the capability to output both status and control signals simultaneously which, for some operations, can be a significant disadvantage.